The present invention generally relates to a method of manufacturing a high density semiconductor device, and the semiconductor device manufactured according to the method. More particularly, it relates to a method of patterning a multi-layer film during the fabrication of a semiconductor device, forming self-aligned plug holes, and the high density semiconductor device manufactured according to the method.
In the manufacture of ultra large scale integrated circuits, multi-level interconnects are commonly used to increase the density of the integrated circuits by reducing the layout area required for forming hundreds of thousands of semiconductor devices.
A conventional method for forming plug holes for a semiconductor device comprising a multi-layer film generally comprises the steps of forming one plug hole at a time with respect to each layer. Each time when a plug hole is to be formed, a patterned photoresist mask is formed on the multi-layer film for defining the location of the plug hole. The multi-layer film is then etched based on the patterned photoresist mask to form the plug hole. The steps of forming patterned photoresist mask and etching the multi-layer film are repeated for the formation of each plug hole. Next, oxide spacers are formed along the walls of the plug holes, defining space for a later fill-in of a conductive material into the plug holes, which results in conductive plugs accessible to different layers in the multi-layer film. Subsequently, when contact plugs for connecting wires of a wiring layer of the semiconductor device to the conductive plugs in the multi-layer film are to be formed, the patterned photoresist layer for defining the locations of the contact plugs need to be aligned with the conductive plugs formed in the multi-layer film. As a result, the conductive plugs and contact plugs are subject to a tight overlay specification. Furthermore, the pitches, which are the distances between the centers of adjacent plug holes, may vary since the each hole is defined by a different patterned photoresist layer. The cost associated with the method described above is also high.
As a result, it is desirable to provide a method for patterning a multi-layer film of a semiconductor device in an efficient and cost effective manner, and forming plug holes in the semiconductor device where the pitches are substantially the same.